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12 March, 2014 - 09:35 By Tony Quested

Karl Heeks, CEO at UltraSoC Technologies

Karl Heeks, CEO at UltraSoC Technologies

UltraSoC Technologies is changing the way companies deliver next-generation electronic devices. Its debug technology accelerates the development and improves the performance of software for systems-on-chip (SoC).

Recent semiconductor advances have seen a proliferation of multi-core processors enhancing the functionality and performance of advanced electronic devices and systems delivering a range of sophisticated low power products.

This is just the start of a new generation of hugely capable electronic systems that will see a blend of multi-core CPUs and multi-core graphic cores embedded into highly integrated SoCs with super-fast fabric interconnects. These advances in processing capability require at least an equal improvement in debug technology to maintain their competitiveness and enable the semiconductor industry to continue innovation as device functionality and integration increases.

1. You have had little trouble raising funds to date. Do you anticipate a need to return to the market to fund mid to long term growth and, if so, on what scale?

Our main source of funding has been from Octopus Investments who have invested $7.5 million in the business to date. This funding has allowed us to develop our unique silicon IP for on-chip analytics which has now entered the market with our lead customer a tier 1 semiconductor company. Our offering, called UltraDebug®, can be used to monitor and control complex SoCs to enable rapid optimisation and debugging of hardware and software running on the SoC which provides the functionality and performance of modern electronic products. UltraDebug® is universally applicable to all chips that enable smart and sophisticated electronic products and it will allow semiconductor companies to deliver higher performance and lower power products into the marketplace more quickly. We are currently looking to raise $6 million to fund growth and value enhancement as we build up deal-flow from demand pent-up within the semiconductor and SoC companies.

2. What headcount are you currently and how do you see scale-up panning out in terms of taking on bodies? We are currently around 15 people and based at St John’s Innovation Centre in Cambridge. Over the next 18-24 months we will be expanding the company to around 30-35 people in order to service our growing IP licencing business. Most of these hires will be engineering staff and will be based in Cambridge, though we will be making some senior hires in sales and marketing who may be based in the US and Asia where most of our customers will be based. We have recently enhanced our board with the appointment of CSR co-founder Graham Pink and NEx chairman Chris Gilbert who as CEO of Ubiquisys recently lead its disposal to Cisco for $310 million as one of the biggest private company sales in Europe over the last two years.

3. Similarly - your technology would seem to have global potential. What new territories are on your radar in the immediate-medium future?

Our technology does indeed have global potential. Our first customer PMC-Sierra is headquartered in the US and and supplies their storage controller products to leading server vendors throughout the world. Our target customers are the big semiconductor chip companies and ‘verticals’ most of which are US or East Asian. As a consequence of this our business development activity is focused in the US though more recently we are engaging with companies in South Korea and China.

4. Looking at your original roadmap and where you are now, how would you assess progress to date?

Our original roadmap was designed to deliver a business plan for a universal debug platform that could support any IP from any vendor. Our progress to date has been pretty good in that we have got a product in the marketplace with a relatively modest level of investment. If what we have now is compared with what was originally envisaged, we now have a more powerful capability and there is increased interest from our customers to use the platform. This is because we had the vision to think big about what the industry needed for the future and the challenges anticipated have materialised to an even greater extent than we thought.

Rather than developing a next-generation debug capability as first planned, we have realised a product capable of enabling a much broader range of on-chip analytic capabilities, such as significant performance and power optimisations. We have also defined and protected what we believe will become the industry standard technique for connecting to a chip during its development.

5. What have been the biggest obstacles you have had to overcome to get where you are currently?

Access to finance is always a challenge, but essentially this acts as a fine filter so your proposition has to be ever more compelling to get funding. Another challenge has been in building a world-class team. We are designing and building disruptive technology and in order to achieve a world-class product we have to pack it with lots of innovation and this requires recruiting and retaining top engineers who relish working in a fast moving and entrepreneurial high-tech start-up.

Finally I would say that the biggest challenge we faced was finding a lead customer who was prepared to take the risk of incorporating our silicon IP onto their extremely valuable chipset, which forms part of a very high-value product in an ecosystem comprising some of the biggest electronics companies in the world. Working with PMC-Sierra has been an extremely good partnership.

6. What do you foresee will be the biggest challenges to further international growth and how do you plan to overcome them?

Our technology is based on a modular silicon IP library which is both flexible and scalable and as such lends itself to extensive re-use with low capital expenditure, and therefore significant opportunity for profitability from high gross margin licensing. A key challenge for us will be to partner with appropriate companies in the ecosystem to ensure maximum up-take without overloading our team. We will need to be sure we are in the right shape to deliver to multiple companies as we drive our product to the de facto standard in debugging and system optimisation.

7. How important has Cambridge been to your early development and will it continue to have a role as you progress?

We picked Cambridge as a place to be based for a number of reasons; access to top quality engineers, close proximity to the VC community in both Cambridge and also London, centre of excellence in science and technology and also because a number of us lived here. As we have grown the company this has proven to be a good decision and we are now further strengthening our ties, particularly with the University, where we now have a TSB funded partnership with the Computer Laboratory which has been such a hotbed of successful spin-out activity.

8. In terms of developing your debugging technology, is there headroom for new generations?

Our silicon IP technology, UltraDebug®, has a really powerful architecture that has been conceived to facilitate continuous advancement through the growth of additional and more sophisticated modules to interact with the system and communication interfaces to suit different product domains. We also designed it on day one to scale from a handful of modules to support several hundred processors and other system units.

In terms of forward development, the Silicon IP is only a small part of the story; the really interesting part is the analytic capabilities it enables, both on-chip and to a lesser extent off-chip. As this is where the complete ecosystem gains the advantages of increased performance, lower power consumption and greater reliability.

9. In your sector, are there challenges in finding people with the right skills sets and what can you do to overcome this?

Finding the right people is rarely easy, so recruitment is a major concern for us and we use specialised recruiting firms to help identify and recruit appropriate staff. Some of the skill sets we require are so new and in such short supply that we are now using our links to leading Universities to take graduates who we can then train in these areas.

10. What is the scale of the market you are addressing?

The total cost of electronic products failing in the market place is enormous – currently running at around $60 billion pa in the US alone (National Institute of Statistics,US). This is in spite of the fact that that nearly half the cost of developing such products is spent on software debugging at around $300 billion PA (Judge Institute, University of Cambridge, UK). We estimate that the on-chip software debugging market (the real-time debugging that we are addressing) is currently over $1 billion and will rise rapidly to around $10 billion by 2020 as product complexity continues to burgeon driven by unrelenting consumer demand and the industries capacity to innovate.

www.ultrasoc.com

@UltraSoC

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